The present invention relates to a method of producing an element separation structure for separating a plurality of elements formed in a semiconductor substrate. In particular, the present invention relates to a method of producing an element separation structure called shallow trench isolation (STI).
Recently, a method of producing a semiconductor with a fine pattern has been sophisticated. Accordingly, with a conventional element separation method according to the LOCOS method, it is difficult to accurately form an element forming region (active region) for forming an element with a fine pattern. To this end, in the STI, a shallow groove is formed in a semiconductor substrate, and a silicon oxide film is filled in the groove for separating an element.
In the production method using the STI, the film structure is removed with a wet etching process in general. During the wet etching process, an undesirable dimple called a divot may be generated in the vicinity of a boundary between the STI and an active region. When the divot is created in the STI, it is possible that a material of, for example, a poly-silicon film to be formed in a step of forming a gate electrode may remain in the divot. As a result, an element formed in the active region may have deteriorated electrical property.
Several methods of forming the STI have been proposed for solving the problems associated with the divot in the STI. For example, after a groove portion is formed in a semiconductor substrate, an oxidation protection film such as a silicon nitride film is selectively and isotropically etched, so that an element separation film having an overhang is formed (see Patent Reference 1).
In Patent Reference 2, a nitride oxide film is formed on a sidewall of a trench, so that a stress applied to an oxide film filled in the trench is reduced, thereby preventing the divot from being generated.
In Patent Reference 3, an oxide layer, a poly-silicon layer, and a nitride layer are formed on a surface of a substrate. A trench is formed in the substrate, and a conformal oxide layer is thermally grown on sidewalls of the trench, the oxide layer, and the poly-silicon layer. Then, a trench dielectric material is filled in the trench, and the surface of the substrate is flattened, thereby forming the STI.
In Patent Reference 4, a thermal oxide film is formed on a surface of a silicon substrate. A mask pattern of a silicon nitride is formed on the thermal oxide film. A trench is formed using the mask pattern as a mask. A first silicon oxide film is filled in the trench, and the first silicon oxide film is removed until a surface of the silicon nitride film is exposed. Further, a second silicon oxide film is formed to fix a micro-scratch, thereby forming the STI.    Patent Reference 1: Japanese Patent Publication No. 2000-323563    Patent Reference 2: Japanese Patent Publication No. 2001-135720    Patent Reference 3: Japanese Patent Publication No. 2001-267413    Patent Reference 4: Japanese Patent Publication No. 2001-267411
In the method of producing the STI disclosed in Patent Reference 1, the nitride film is removed over a large area, thereby making it difficult to reduce a size of the active region. In the configuration disclosed in Patent Reference 2, when the oxide film on the sidewall of the trench contains nitrogen, a facet may be generated, thereby inducing connection leak. In the methods of producing the element separation structure disclosed in Patent Reference 3 and Patent Reference 4, it is difficult to obtain uniformity within a plane.
In view of the problems described above, an object of the present invention is to provide a technology capable of producing an element separation structure applicable to the advancement of recent fine patterning technology. In the present invention, it is possible to prevent the divot from being generated and obtain good uniformity within a plane without deteriorating an electrical property of an element formed in an active region.
Further objects and advantages of the invention will be apparent from the following description of the invention.